Intel Electrical Design Pathfinding and Development Engineer in Des Moines, Iowa
This position is for an Electrical Design Pathfinding and Development Engineer within the Sort Test Technology Development (STTD) organization at Intel. STTD Team at Intel designs every product interface unit (xIU) to enable sort testing the entirety of Intel's product portfolio across all sources of products (Client, Server, System-on-a-chip, 5G products, FPGA). Future test tooling solutions need innovative 'out-of-the-box' solutions to meet the power and signal integrity requirements of future products. In this role, the candidate will manage pathfinding and development activities to enable all future IP features and full chip integration testing needs across all of Intel's products.
Applicant will lead projects of electrical pathfinding and development which may include:
Defining Design rules for ensuring performance expectations will be met in PCBs, space transformer/package and probe arrays
Implementing automated verification methods for the Design Rules across the ecosystem (Si design runsets, diefile/FIELD checks, supplier verification systems, etc.)
Defining the HSIO and power delivery hardware and methods roadmap with all BU partners
Developing electrical design rules through measurement and simulation to achieve the product requirements.
Defining with Si design and Business Unit partners DFT/test method innovations to meet product requirements
Enabling new test methods, DFT and Sort process control measurements for testing pre-packaged silicon die across all packaging/assembly roadmap offerings.
The ideal candidate must exhibit the following behavior traits:
Technical problem-solving skills
Willingness to independently drive improvements.
Willingness to multitask with good tolerance of ambiguity.
Excellent communication skills.
- The ideal candidate should possess a master's degree with 6+ moths of experience or PhD degree with 1+ years of experience in Electrical Engineering, Material Science, Chemical Engineering, Mechanical Engineering, Physics or related Engineering field and related industry.
Demonstrated history of managing projects and hitting a committed schedule
Package design experience
PCB / Package design experience
Strong ability to multitask with good tolerance of ambiguity.
Familiar with electrical simulation packages from Cadence, ANSYS, ADS
Inside this Business Group
As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore’s Law to bring smart, connected devices to every person on Earth.
Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, and benefit programs. Find more information about our Amazing Benefits here: https://www.intel.com/content/www/us/en/jobs/benefits.html
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.
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