Intel Mask Layout Design Engineer - Analog/RF in Des Moines, Iowa
As a Physical Design Engineer, you would be responsible for creating bottoms-up elements of chip design including but not limited to transistor, cell, and block-level custom layouts, floor plans, abstract view generation. This includes schematic-to-layout generation, verification and debug using phases of physical design development. Including parasitic extraction, wire load models, clock generation, custom polygon editing, floor-planning, full-chip assembly, packaging and verification. In addition you will be responsible for troubleshooting a wide variety of issues including difficult design concerns and apply proactive intervention.
The ideal candidate should exhibit behavioral traits that indicate:
Excellent interpersonal and communications skills
Demonstrated attention to detail and can take direction and follow-through on assignments
Exceptional Team player and willing to learn
You must possess the below requirements to be initially considered for this position. Preferred qualifications are in addition to the requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your schoolwork and/or classes and/or research and/or relevant previous job and/or internship experiences
- The Candidate must possess a Bachelor’s degree or Master’s degree in Electrical Engineering, Computer Engineering or related discipline or in lieu of a degree a minimum of 5+ years of integrated circuit physical design experience.
5+ years of experience in below areas:
Working knowledge of physical design requirements for mixed-signal, analog, and RF circuitry
Experience in Cadence design flow, Virtuoso, and/or comparable tools
Experience with foundry technology cmos, finFET at 14nm and below
Working knowledge of various verification flows for DRC and LVS in either ICV or Calibre toolsets
Must understand how to run extraction tools and how to use that feedback to guide physical design
Experience with Intel's advanced technology nodes
Working knowledge of physical design requirements for radio-frequency circuitry
Familiar with Electromigration, Self-Heating Issues and how to mitigate them
Familiar with double patterning technologies
This position is not eligible for Intel immigration sponsorship
Inside this Business Group
Intel Labs is the company's world-class, industry leading research organization, responsible for driving Intel's technology pipeline and creating new opportunities. The mission of Intel Labs is to deliver breakthrough technologies to fuel Intel's growth. This includes identifying and exploring compelling new technologies and high risk opportunities ahead of business unit investment and demonstrating first-to-market technologies and innovative new usages for computing technology. Intel Labs engages the leading thinkers in academia and industry in addition to partnering closely with Intel business units.
Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, and benefit programs. Find more information about our Amazing Benefits here: https://www.intel.com/content/www/us/en/jobs/benefits.html
This role is available as a fully home-based and generally would require you to attend Intel sites only occasionally based on business need. This role may also be available as our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.
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