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Job Description

Do Something Wonderful!

Intel put the Silicon in Silicon Valley. No one else is this obsessed with engineering a brighter future. Every day, we create world changing technology that enriches the lives of every person on earth. So, if you have a big idea, let’s do something wonderful together. Join us, because at Intel, we are building a better tomorrow. Want to learn more? Visit our YouTube Channel (https://www.youtube.com/c/Intel/videos) or the links below!

Life at Intel (https://www.intel.com/content/www/us/en/jobs/life-at-intel.html)

Diversity at Intel

Intel Foundry Services (IFS) is an independent foundry business that is established to meet our customers' unique product needs. With the first Open System Foundry model in the world, our combined offerings of wafer fabrication, advanced process, and packaging technology, chiplet, software, robust ecosystem, and assembly and test capabilities help our customers build their innovative silicon designs and deliver full end-to-end customizable products from Intel's secure, resilient, and sustainable source of supply. This job opportunity in IFS will be part of the Customer Solutions Engineering (CSE) group which is responsible for the portions of the system foundry that brings the best of Intel technologies to IFS customers, differentiating and accelerating their solutions from architecture to post-silicon validation.

As a Structural Design Engineer in IFS you will:

Perform physical design implementation of custom IP and SoC designs from RTL to GDS to create a design database that is ready for manufacturing.

Conduct all aspects of the physical design flow including synthesis, place and route, clock tree synthesis, floor planning, static timing analysis, power/clock distribution, reliability, and power and noise analysis.

Conduct verification and signoff including formal equivalence verification, static timing analysis, reliability verification, static and dynamic power integrity, layout verification, electrical rule checking, and structural design checking.

Achieve final convergence.

Analyze results and make recommendations to fix violations for current and future product architecture.

Possess expertise in various aspects of structural and physical design, including physical clock design, timing closure, coverage analysis, multiple power domain analysis, placing, routing, synthesis, and DFT using industry standard EDA tools.

Optimize and converge design to improve product-level parameters such as power, frequency, and area.

Participate in the development and improvement of physical design methodologies and flow automation.

Mentor and coach team members

The ideal candidate will possess the following attributes:

Willingness work within competing delivery dates from different customers.

Strong communication and skills.

Detail oriented and able to express technical ideas and initiatives clearly in writing or by presentation.

Self-driven with ability to prioritize work and accomplish tasks quickly.

Willingness to mentoring others and lead teams or projects.

Qualifications

What we need to see (Minimum Qualifications):

• Bachelor of Science degree in Electrical Engineering or Computer Engineering or related field with 4+ years relevant experience or a Master of Science in Electrical Engineering or Computer Engineering or related field and 3+ years’ of experience.

• 3+ years’ experience in structural and physical design, including physical clock design, timing closure, coverage analysis, multiple power domain analysis, placing, routing, synthesis, and DFT

• 3+ years’ experience with industry standard EDA as Synopsys and Cadence such as Fusion Compiler, Innovus, PrimeTime, Conformal.

• 2+ years’ experience with at least one scripting language (perl, tcl, python)

How to Stand out (Preferred Qualifications):

• Post graduate degree Electrical Engineering, Computer Engineering, Computer Science, or in a related field of study Demonstrate experience and hands-on practical knowledge with standard-cell based VLSI design methodology and relevant industry standard EDA tools.

• Demonstrated experience with analytical and problem-solving skills through

• relevant experiences with ASIC/SOC design convergence.

• Strong experience in scripting with Unix shell, Perl and TCL.

• Experience with digital design, circuits, layout with a thorough understanding of CMOS processes.

Amazing Benefits!

Here at Intel, we invest in our people. Beyond health, dental, and retirement benefits, Intel’s benefits package includes 14 paid holidays per calendar year, three weeks of paid vacation, and four-week paid sabbatical every four years of employment. Intel also offers employees five bonuses per year dependent on overall company and personal performance, and an employee stock purchase program. Find more information about our Amazing Benefits here (https://jobs.intel.com/benefits) : https://jobs.intel.com/benefits

Inside this Business Group

Intel Foundry Services (IFS) is an independent foundry business that is established to meet our customers' unique product needs. With the first "Open System Foundry" model in the world, our combined offerings of wafer fabrication, advanced process, and packaging technology, chiplet, software, robust ecosystem, and assembly and test capabilities help our customers build their innovative silicon designs and deliver full end-to-end customizable products from Intel's secure, resilient and sustainable source of supply.

Other Locations

US, TX, Austin; US, AZ, Phoenix; US, CA, Folsom; US, CA, Santa Clara

Covid Statement

Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here: https://www.intel.com/content/www/us/en/jobs/benefits.html

Annual Salary Range for jobs which could be performed in US, California: $139,480.00-$209,760.00

*Salary range dependent on a number of factors including location and experience

Working Model

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.